40-Pin Header

 

Design Notes:

  • All logic levels are 1.8V.
  • Signals available on 0.100" through-holes.
  • A to D converter lines run direct to the TPS65950 with a maximum 2.5V.
  • The VCC_1.8 signal is generated on the expansion board. 
  • More information on Texas Instrument's TPS65950 ·Audio and Power Management module may be found here.
  • The 40-pin header is available on the Summit, Tobi, Chestnut43, Palo43, Palo35 and Gallop43 expansion boards.
  • This 40-pin header is not available on any Overo COM. 

 

Latest revisions:

April 16, 2012

  • Added notes 2 and 3 to the signal table below.

May 27, 2010

  • Pin 18 is now correctly labeled as GPIO_10. Pin 18 was incorrectly labeled as GPIO127_TS_IRQ.
  • Pin 17 is now correctly labeled as GPIO_186. Pin 17 was incorrectly labeled as GPIO128_GPS_PPS.

February 9, 2010

  • Correct VCC_1.8 information.

April 23, 2012

  • Added notes 2 and 3.

 

Comments
Signal Pin Pin Signal Comment
· V_BATT
40
39 ADCIN4
·
· ADCIN3 38 37 AGND
·
· ADCIN5 36 35 ADCIN6 ·
· ADCIN2 34 33 ADCIN7 ·
· PWM1 32 31 PWM0 ·
Note 1 GPIO144_PWM9 30 29 GPIO147_PWM8 ·
Note 1 GPIO145_PWM10 28 27 GPIO146_PWM11 ·
· VCC_1.8 26 25 GND ·
· GPIO185_SDA3 24 23 GPIO184_SCL3 ·
· GPIO166_IR_TXD3 22 21 GPIO165_IR_RXD3 ·
· GPIO163_IR_CTS3 20 19 GPIO170_HDQ_1WIRE ·
· GPIO_10 18 17 GPIO_186 ·
· VCC_1.8 16 15 GND ·
· POWERON 14 13 GPIO[0/31]_WAKEUP Note 2
· VBACKUP 12 11 SYS_EN ·
Note 3 GPIO148_TXD1 10 9 GPIO151_RXD1 ·
· GPIO175_SPI1_CS1 8 7 GPIO173_SPI1_MISO ·
· GPIO174_SPI1_CS0 6 5 GPIO172_SPI1_MOSI
·
· GPIO114_SPI1_NIRQ 4 3 GPIO171_SPI1_CLK ·
· VCC_3.3 2 1 GND ·

1. GPIO144_PWM9 and GPIO145_PWM10 signals are used to drive the 4.3" and 3.5" LCD panels.  Respectively, these are the "display enable" and "backlight PWM" lines.

2. GPIO0_WAKEUP becomes GPIO31_WAKEUP on all COMs post R2410.

3. On some schematics, this net is erroneously labeled GPIO158_TXD1.